2006 [-]

2005 [11]

2004 [12]

2003 [15]

2002 [7]

2001 [18]

2000 [12]

1999 [11]

1998 [6]

1997 [11]

1996 [13]

1995 [5]

1994 [9]

1993 [6]

1992 [9]

[145]

Brzozowski I., Kos A., Power dissipation reduction during synthesis of two-level logic based on probability of input vectors changes, in Integrated Circuit and System Design – Power and Timing Modeling, Optimization and Simulation,
Springer-Verlag Berlin Heidelberg 2005, pp. 456-465

[144]

Boroń K., Bratek P., Kos A., Matrix of thermal characters for the blind based on Peltier modules, XXIX International Conference of IMAPS Poland Chapter,
Koszalin-Darłówko, 18-21 September 2005, pp.267-270

[143]

Bratek P., Boroń K., Kos A., Temperature time response of thermoelectric modules, XXIX International Conference of IMAPS Poland Chapter, Koszalin-Darłówko,
18-21 September 2005, pp.143-146

[142]

Boroń K., Bratek P., Kos A., Measuring gradient of temperature based on Peltier module, XXIX International Conference of IMAPS Poland Chapter, Koszalin-Darłówko,
18-21 September 2005, pp.139-142

[141]

Kos A., Nagórny Z., Estymacja długości połączeń w układach VLSI, Materiały Krajowej Konferencji Elektroniki, Darłowo, czerwiec 2005, Tom 1, ss.159-164

[140]

Gołda A., Kos A., Test chip for research and education, Proc. of the 12^th International Conference on Mixed Design of Integrated Circuits and Systems,
MIXDES 2005, 22-25 June, Vol. 2, pp. 867-870

[139]

Gołda A., Kos A., Web-based teaching aids to artificial intelligence, Proc. of the 12^th International Conference on Mixed Design of Integrated Circuits and Systems,
MIXDES 2005, 22-25 June, Vol. 1, pp. 677-680

[138]

Kos A., Nagórny Z., A modified Hopfield neural network for VLSI placement, Proc. of the 12^th International Conference on Mixed Design of Integrated Circuits and Systems,
MIXDES 2005, 22-25 June, Vol. 1, pp.33-38

[137]

Gołda A., Kos A., Steady State Electro-Thermal Simulations of Digital CMOS Circuits, Proc. of the International EMPC IMAPS 2005, June 12-15, Brugge, Belgium, pp. 509-512

[136]

Nagórny Z., Kos A., Optymalizacja z wykorzystaniem zmodyfikowanej sieci Hopfielda, Kwartalnik Elektroniki i Telekomunikacji, 2005, z. 2, ss. 255-275

[135]

Kos A., Nagórny Z., Minimalizacja długości połączeń w układach elektronicznych z wykorzystaniem sieci Hopfielda,
Kwartalnik Elektroniki i Telekomunikacji, 2005, z. 1, ss. 55-72

[134]

Gołda A., Kos A., Temperature influence on energy losses in MOSFET capacitors,
Elsevier, Microelectronics Reliability, 44, 2004, pp. 1115-1121

[133]

Gołda A., Kos A., Impact of gate load on other gates on CMOS logic networks,
Proc. of the XXVIII International Conference of IMAPS Poland Chapter,
Wrocław, 26-29 September 2004, pp. 233-236

[132]

Gołda A., Kos A., Analysis of steady state temperature distribution in CMOS integrated circuits, Proc. of the XXVIII International Conference of IMAPS Poland Chapter, Wrocław, 26-29 September 2004, pp. 229-232

[131]

Brzozowski I., Kos A., Assessment and modeling of quasi-short power dissipation in CMOS gates, Proc. of the XXVIII International Conference of IMAPS Poland Chapter, Wrocław, 26-29 September 2004, pp. 183-186

[130]

Bratek P., Brzozowski I., Gołda A., Boroń K., Kos A., Matrix of thermal characters for the blind, Proc. of the XXVIII International Conference of IMAPS Poland Chapter, Wrocław, 26-29 September 2004, pp. 179-182

[129]

Brzozowski I., Kos A., Input voltage impact on quasi-short power dissipation of CMOS Gates, Proc. of the International Conference on Signals and Electronic Systems, Poznań, Poland, September 13-15, 2004, pp. 23-26

[128]

Dziurdzia P. : “Simulations of Heat Flow in Active Cooled Packaged Microstructures”, Proc. of the XXVIII International Conference of International Microelectronics and Packaging Society Poland Chapter, Wroclaw, Poland, 26-29 September 2004, pp. 215-218

[127]

Dziurdzia P. : “Design for Improved Reliability of Systems on Chips”, Proc. of the XXVIII International Conference of International Microelectronics and Packaging Society Poland Chapter, Wroclaw, Poland, 26-29 September 2004, pp. 211-214

[126]

Dziurdzia P. : “Efficient Current Monitors for On-line Testing of Systems on Chips”, Proc. of the 11-th International Conference Mixed Design of Integrated Circuits and Systems, Szczecin, Poland, 24-26 June 2004, pp. 486-490

[125]

Dziurdzia P., Worek C., Mirocha A. : “Symulacja elektrotermicznych procesów w aktywnym chłodzeniu mikroukładów”,
III Krajowa Konferencja Elektroniki, Kołobrzeg, Czerwiec 2004, pp. 365-370

[124]

Brzozowski I., Kołodziej J., Kos A., Simulation methods for estimation of dynamic power dissipation in digital CMOS circuits, Proc. of the Mixed Design of Integrated Circuits and Systems, MIXDES 2004,
Szczecin, Poland, 24-26 June 2004, pp. 435-440

[123]

Gołda A., Bratek P., Kos A., Power losses phenomena in CMOS inverter,
Proc. of the European Microelectronics and Packaging Symposium,
Prague 16^th to 18^th June 2004, Czech Republic, pp. 611-616

[122]

Gołda A., Kos A., Static versus dynamic power losses in CMOS VLSI systems considering temperature, Proc. of the IFIP WG 10.5 Conference on Very Large Scale Integration of System-on Chip,
December 1-3, 2003, Darmstadt, Germany, pp. 252-257

[121]

Gołda A., Kos A., Ocena parametrów użytkowych układów cyfrowych CMOS –
Cz. 2. Straty energii,
Kwartalnik Elektroniki i Telekomunikacji, 2003, 49, z. 4, ss. 567-595

[120]

Gołda A., Kos A., Ocena parametrów użytkowych układów cyfrowych CMOS –
Cz. 1 Modele bramek, margines zakłóceń, czas propagacji,
Kwartalnik Elektroniki i Telekomunikacji, 2003, 49, z. 4, ss.539-566

[119]

P. Dziurdzia : “Elektrotermiczny model modułu Peltiera zaimplementowany w SPICE”, Elektronika 8/9,
Wydawnictwo SIGMA NOT, 2003, pp. 37-40

[118]

Gołda A., Kos A., Temperature influence on power consumption and time delay, Proc. of IEEE Computer Society: EUROMICRO Symposium on Digital System Design, Belek-Antalya, Turkey, September 1-6, 2003, pp. 378-382

[117]

Gołda A., Kos A., Width of MOSFET channel influence on energy losses and propagation time delay in CMOS circuits, Proc. Of the ECCTD’03 – European Conference on Circuit Theory and Design, September 1-4, 2003, Kraków, Poland, pp. I-34-37

[116]

Bratek P., Kos A., Optimisation of temperature fields of microsystems with self-organising neural nets, Active and Passive Elec. Comp., September 2003, Vol. 26, pp. 141-149

[115]

P. Dziurdzia : “Elektrotermiczny model modułu Peltiera zaimplementowany w SPICE”, II Krajowa Konferencja Elektroniki,
Kołobrzeg, Czerwiec 2003, pp. 127-132

[114]

Magoński Z., Termiczny miernik matężenia przepływu benzyny,
II Krajowa Konferencja Elektroniki, Kołobrzeg, 9-12 czerwiec 2003, ss. 579-584

[113]

Kos A., Elektronika dzisiaj i jutro, art. zaproszony, Przegląd Telekomunikacyjny, 4, 2003, ss. 161-165

[112]

Brzozowski I., Kos A., Modelling of dynamic power dissipation for static CMOS gates and logic networks Proc. of the 10th Int. Conf. On Mixed Design of Integrated Circuits and Systems – MIXDES 2003, Lódz, Poland, 26-28 June 2003, pp. 336-341

[111]

Gołda A., Kos A., Energy collected by MOSFET capacitance and its temperature dependence, Proc. Of the 10th Int. Conf. On Mixed Design of Integrated Circuits and Systems – MIXDES 2003, Lódz, Poland, 26-28 June 2003, pp. 323-328

[110]

Kos A., Jaki język, czyli unijna rzeczywistość, Biuletyn Informacyjny Pracowników AGH, Kraków, nr 118/19, 2003, ss.4-5 (praca o charakterze społecznym)

[109]

Kos A., Moje 3 grosze do “5”, Biuletyn Informacyjny Pracowników AGH, Kraków, nr 116, 2003, s.6 (praca o charakterze społecznym)

[108]

Dziurdzia P., Brzozowski I., Bratek P., Kos A., IDD current monitoring cell for VLSI systems – project, fabrication and verification, Bulletin of the Polish Academy of Sciences, Technical Sciences, Vol. 51, No. 1, 2003, pp.25-30

[107]

Bratek P., Kos A., Optimum topography design of electronic circuits with self-organising neural nets, Proc. of the 4th International Workshop on Computer Science and Information CSIT’2002, 18-20 September 2002, Patras, Greece (on CD ROM)

[106]

P. Dziurdzia, P. Bratek : “Benchmark ASIC for IDDQ Current Monitoring and Thermal Testing Methods Comparison”,
Proc. of the 9-th International Conference Mixed Design of Integrated Circuits and Systems,
Wrocław, Poland, 20-22 June 2002, pp. 365-370

[105]

Gołda A., Kos A., Experimental verification of energy losses in CMOS gates, Proc. of the 9th International Conference Mixed Design of Integrated Circuits and Systems, Wroclaw, Poland, 20-22 June 2002, pp.375-380

[104]

Brzozowski I., Kos A., New idea of objective assessment of energy consumed by real VLSI gates, Proc. of the 9th International Conference Mixed Design of Integrated Circuits and Systems, Wroclaw, Poland, 20-22 June 2002, pp.579-584

[103]

P. Dziurdzia, : “Monitorowanie prądu IDD w układach VLSI”, Krajowa Konferencja Elektroniki, Kołobrzeg-Dźwirzyno, Czerwiec 2002, pp. 691-696

[102]

Gołda A., Kos A., Straty energii w układach VLSI na podstawie technologii MIETEC CMOS 0.7um-C07MA-C07MD, Materiały Krajowej Konferencji Elektroniki,
Kołobrzeg-Dźwirzyno, czerwiec 2002, ss. 485-490

[101]

Kos A., Współczesna nanoelektronika,
Materiały Konferencji p.n. Współczesne kierunki rozwoju elektrotechniki, automatyki, informatyki, elektroniki i telekomunikacji”,
Kraków, 7-9 czerwca 2002, ss.105-108

[100]

Bratek P., Kos A., Fault diagnosis and fault localisation in integrated circuits by thermal method, Proc. of the 13th International Conference on Microelectronics, ICM’2001, Rabat, Morocco, 29-31 October 2001, pp. 72-77

[99]

Bratek P., Kos A., Fault localisation in integrated circuits by thermal method,
Proc. of the Symposium on Microelectronic Technologies, Microsystems and Mems, MTM 2001 Pitesti, Romania, June 7-9, 2001, pp. 72-77

[98]

Bratek P., Kos A., Wirtualne wykłady projektowania systemów ASIC,
Materiały III Krajowej Konferencji “Metody i Systemy Komputerowe w Badaniach Naukowych i Projektowaniu Inżynierskim”,
Kraków, 19-21, listopada 2001, ss. 433-436

[97]

Kołodziej J., Kos A., Program do analizy strat energii w układach CMOS VLSI dla założonych rozkładów zmiennych wejściowych,
Materiały III Krajowej Konferencji “Metody i Systemy Komputerowe w Badaniach Naukowych i Projektowaniu Inżynierskim”,
Kraków, 19-21, listopada 2001, ss. 449-454

[96]

Kos A., On thermal time constants of VLSI circuits, Proc. of SPIE, vol. 4600 (2001), International Symposium on Optoelectronics and Microelectronics,
Nanjing, China, 7-9 November 2001, pp. 160-169

[95]

Kos A., Thermal time constants of various substrates of integrated circuits, Microelectronics International, Vol. 18, No. 3, September 2001, pp. 9-14

[94]

Dziurdzia P., Brzozowski I., Bratek P., Kos A., IDD current monitoring cell for VLSI circuits - design and testing, Proc. of the International Conference on Signals and Electronic Systems, Łódź, Poland, 18-21 September 2001, pp. 363-368

[93]

Gołda A., Kos A., Energy consumption by CMOS gates,
Proc. of the International Conference on Signals and Electronic Systems,
Łódź, Poland, 18-21 September 2001, pp.425-430

[92]

Dziurdzia P., Kos A., Monitoring of power dissipated in microelectronic structures, Elsevier, Microelectronics Reliability, Vol. 41, 2001, pp. 1971-1978

[91]

Kołodziej J., Kos A., Estymacja strat energii w układach cyfrowych CMOS, Kwartalnik Elektroniki i Telekomunikacji PAN – vol. 47, z. 3, 2001, ss. 303-322

[90]

Brzozowski I., Kos A., Logic synthesis method for power dissipation reduction in combinational digital circuits, Bulletin of the Polish Academy of Science, Technical Sciences, Vol. 49, No. 4, 2001, pp. 581-594

[89]

Bratek P., Kos A., A method of thermal testing of microsystems,
Elsevier, Microelectronics Reliability, Vol. 41, 2001, pp. 1877-1887

[88]

Rawski M., Jachna Z., Brzozowski I., Rzechowski R.,
Practical Aspects of Logic Synthesis Based on Functional Decomposition,
Proceedings of the 27^th EUROMICRO Conference,
Warsaw, Poland, September 4-6, 2001, pp. 38-45

[87]

Bratek P., Dziurdzia P., Brzozowski I., Kos A., WEB-based teaching of ASIC design, Proceedings of the 8^th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2001,
21-23 June 2001, Zakopane, Poland, pp. 533-536

[86]

Gołda A., Kos A., Power dissipation in simple CMOS gates, Proceedings of the 8^th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2001, 21-23 June 2001, Zakopane, Poland, pp. 221-224

[85]

Dziurdzia P. Kos A., SPICE Based Simulations of Electrothermal Processes,
Proc. of the EuroSimE International Conference, Benefiting from Thermal and Mechanical Simulation in (Micro)-Electronics,
Paris, France, April 9-11, 2001, pp. 297-301

[84]

Dziurdzia P., Kos A., Tool for Fast Modelling of Active Heat Sinks ,
Proc. of the Seventeenth Annual IEEE Semiconductor Thermal Measurement and Managment Symposium, SEMI-THERM XVII,
San Jose, California, USA, March 20-22, 2001, pp. 174-179

[83]

Bratek P., Kos A., Temperature Sensors Placement Strategy for Fault Diagnosis in Integrated Circuits, Proc. of the Seventeenth Annual IEEE Semiconductor Thermal Measurement and Managment Symposium, SEMI-THERM XVII,
San Jose, California, USA, March 20-22, 2001, pp. 245-251

[82]

Brzozowski I., Kos A., Energy Consumption Minimisation with New Synthesis Method, Proc. of the IEEE International Conference on Electronics, Circuits and Systems, Kaslik, Lebanon, December 17-20, 2000, pp. 605-608

[81]

Bratek P., Kos A., Monitorowanie pól temperatury modułów scalonych,
Materiały VII Konferencji Naukowej – Technologia Elektronowa, ELTE 2000, Polanica Zdrój, 18-22 wrzesnia 2000, pp. 490-493

[80]

Bratek P., Kos A., Fault Diagnosis in Integrated Circuits with Thermal Method, Proc. of the ICSES’2000 - International Conference on Signals and Electronics Systems,
17-20 October 2000, Ustroń, Poland, pp. 515-520

[79]

Kołodziej J., Kos A., Estimation of Average power Dissipation in Digital CMOS Circuits, Proc. of the ICSES’2000 - International Conference on Signals and Electronics Systems, 17-20 October 2000, Ustroń, Poland, pp. 421-426

[78]

Brzozowski I., Kos A., Synthesis Method for Power Supply Reduction in Digital Circuits, Proc. of the ICSES’2000 - International Conference on Signals and Electronics Systems,
17-20 October 2000, Ustroń, Poland, pp. 355-360

[77]

Dziurdzia P., Kos A., New Method of Active Cooling, Proc. of the 4^th International Symposium on Microelectronic Technologies and Microsystems,
26-27 October 2000, Zwickau, Germany, pp. 35-40

[76]

Dziurdzia P., Kos A., Electro-thermal Simulations of Power Feedback in Active Cooling of Microstructures, Proc. of the 6^th THERMINIC Conference,
24-27 September 2000, Budapest, Hungary, pp. 97-100

[75]

Bratek P., Problem wykrywania uszkodzeń mikroukładów metodą termiczną,
Raport - SEM'00, Wyższa Szkoła Morska w Gdyni, Gdynia, wrzesień 2000, ss. 35-36

[74]

Brzozowski I., Bratek P., Dziurdzia P., Kos A., New Concept of Low Power Digital Circuits Design, Proc. of the 7^h International Conference on Mixed Design of Integrated Circuits and Systems – MIXDES’2000,
Gdynia, Poland, 15-17 June 2000, pp. 181-184

[73]

Bratek P., Dziurdzia P., Kos A., Software Heat Transfer Solution for Education and Research”, Proc. of the 7^th International Conference on Mixed Design of Integrated Circuits and Systems – MIXDES’2000,
Gdynia, Poland, 15-17 June 2000, pp. 361-366

[72]

Bratek P., Kos A., New Concept of Temperature Sensors Placement Strategies for Thermal Monitoring of ICs,
Proc. of Design and Diagnostics of Electronic Circuits and Systems Workshop,
Smolenice, 5-7 April 2000, pp. 96-99

[71]

Dziurdzia P., Kos A., High Efficiency Active Cooling System,
Proc. of the Sixteenth IEEE Semiconductor Thermal Measurement and Managment Symposium, SEMI-THERM 2000,
San Jose, California, USA, March 21-23, 2000, pp.19-26

[70]

Bratek P., Brzozowski I., Dziurdzia P., Kos A., Narzędzia do symulacji termicznej układów ASIC, II Krajowa Konferencja Metody i systemy komputerowe w badaniach naukowych i projektowaniu inżynierskim,
Kraków, 25-27 października 1999, pp. 471-476

[69]

Dziurdzia P., Bratek P., Brzozowski I, Kos A., Wybrany projekt układu ASIC,
II Krajowa Konferencja Metody i systemy komputerowe w badaniach naukowych i projektowaniu inżynierskim,
Kraków, 25-27 października 1999, pp. 143-148

[68]

Dziurdzia P., Bratek P., Kos A., Current Sensor for Active Heat Sink Control,
Proc. of the XXIIst National Conference on Circuit Theory and Electronic Networks,
Warszawa – Stare Jabłonki, October 20-23, 1999, pp. 349-354

[67]

Brzozowski I., Kos A., Switching Activity Reduction with a New Logic Synthesis Method, Proc. of the XXIIst National Conference on Circuit Theory and Electronic Networks,
Warszawa – Stare Jabłonki, October 20-23, 1999, pp. 143-148

[66]

Dziurdzia P., Bratek P., Brzozowski I., Kos A., ASIC for Active Heat Sinks Control – Design and Testing, Bulletin of the Polish Academy of Sciences, Technical Sciences, Vol. 47, No. 3, 1999, pp. 301-308

[65]

Dziurdzia P., Kos A., Electrothermal Macromodel of Active Heat Sink for Cooling Process Simulation, 5^th THERMINIC International Workshop on Thermal Investigations of ICs and Systems,
Rome, Italy, 3-6 October 1999, pp. 76-81

[64]

Brzozowski I., Kos A., Minimisation of power Consumption in Digital Integrated Circuits by Reduction of switching Activity,
IEEE Computer Society Proc of the 25^th EUROMICRO Conference,
Milan, Italy, September 8-10, 1999, pp. 376-380.

[63]

Dziurdzia P., Bratek P., Brzozowski I., Kos A., Software Tools for Simulation of heat Conduction and Active Cooling of Microstructures, Proc. of the 6^th International Conference on Mixed Design of Integrated Circuits and Systems – MIXDES’99, Kraków, Poland, 17-19 June 1999, pp. 531-534

[62]

Bratek P., Dziurdzia P., Brzozowski I., Kos A., Temperature Sensor for Integrated Circuits, Proc. of the 6^th International Conference on Mixed Design of Integrated Circuits and Systems – MIXDES’99, Kraków, Poland, 17-19 June 1999, pp. 327-330

[61]

Brzozowski I., Bratek P., Dziurdzia P., Kos A., ASICs Design – Education and Research, Proc. of the 22^nd Conference of IMAPS Poland,
Zakopane, October 1-3, 1998. The International Microelectronics and Packaging Society Poland Chapter, Kraków 1999, pp. 107-110

[60]

Wiśniewski B., Szecówka B., Ostrowski J., Brzozowski I.,
Wzbudzanie i odbiór sygnału swobodnej precesji protonów w ziemskim polu magnetycznym, Elektronika, nr 1, 1999, s. 19

[59]

Bratek P., Kos A., Application of Inverse TLM Method to IC Thermal Testing,
Proc. of the 43^rd Internationales Wissenschaftliches Kolloquium,
Ilmenau, 21-24.09.1998, pp. 264-268

[58]

Dziurdzia P., Kos A., Active Heat Sinks for Power Systems,
Proc. of the 43^rd Internationales Wissenschaftliches Kolloquium,
Ilmenau, 21-24.09.1998, pp.122-123

[57]

Dziurdzia P., Bratek P., Kos A., ASIC for Active Heat Sinks Control,
Proc. of the XXIst National Conference on Circuit Theory and Electronic Networks,
Poznań-Kiekrz, October 22-24, 1998, pp. 363-368

[56]

Bratek P., Dziurdzia P., Kos A., Optimisation of Cooling Process with Active heat Sinks,
Proc. of the 4^th International Workshop on Thermal Investigations of ICs and Microstructures, Cannes, 27-29 September, 1998, pp. 39-42

[55]

Dziurdzia P., Bratek P., Kos A., Software Tools for ASIC Education,
Proc. of the 5^th International Conference on Mixed Design of Integrated Circuits and Systems,
Łódź, Poland, 18-20 June 1998, pp. 505-508

[54]

Bratek P., Dziurdzia P., Kos A., New Method of Active heat Sinks Control,
Proc. of the 5^th International Conference on Mixed Design of Integrated Circuits and Systems,
Łódź, Poland, 18-20 June 1998, pp. 195-198

[53]

Kos A., Neural Nets for Prediction and Optimisation of Temperature Fields,
Materiały 1 Seminarium Zastosowania Sztucznych Sieci Neuronowych w Symulacjach
i Sterowaniu Procesami Metalurgicznymi,
Kraków, 24 kwietnia 1997, ss. 73-78

[52]

Dziurdzia P., Bratek P., Kos A., New ASIC Concept for Motor-Car Systems,
Proc. of the XX Conference on Circuit Theory and Electronic Networks,
Kołobrzeg, 21-24 October, 1997, pp. 349-354

[51]

De Baetselier E., De Mey G., Kos A., Thermal Image Generator as a Vision Prosthesis for the Blind,
MST Poland News, No. 3(7), October 1997, pp. 3-5

[50]

Osipowicz K, Bratek P., Dziurdzia P., Kos A., Application of Cellular Neural Network for Image Recognition,
Proc. Of the Third Conference on Neural Networks and Their Applications,
Kule, 14-18. October 1997, pp.227-232

[49]

Dziurdzia P., Bratek P., Kos A., Power Feedback for Temperature Control of Ics,
Proc. Of the 3-rd International Workshop on Thermal Investigations of ICs and
Microstructures, Cannes, September 21-23, 1997, France, pp.177-179

[48]

Bratek P., Dziurdzia P., Kos A., ASIC Neural Cell for Solving Optimisation tasks,
Proc. ot the 4^th International Workshop Mixed Design of Integrated Circuits and
Systems, Education of Computer Aided Design of Modern Devices and ICs,
Poznań, Poland, 12-14 June 1997, pp. 457-462

[47]

Kos A., G. De Mey, Thermal Modelling and Optimisation of Power Microcircuits,
Electrochemical Publications, Bristol, England, 1997, książka

[46]

Kos A., Neural tools for electro-thermal design,
Proc. Of the 11^thEuropean Microelectronics Conference,
Venice, Italy, May 14-16, 1997, pp. 339-346

[45]

Kos A., Bratek P., Dziurdzia P., Ciepło - kłopot czy pożytek ?
VI Konferencja Naukowa “Technologia Elektronowa” - ELTE’97,
Krynica, 6-9 maja 1997, ss. 550-553

[44]

Dziurdzia P., Bratek P., Kos A., Projektowanie topografii układów VLSI
za pomocą sieci neuronowych,
VI Konferencja Naukowa “Technologia Elektronowa” - ELTE’97,
Krynica, 6-9 maja 1997, ss. 466-469

[43]

Bratek P., Dziurdzia P., Kos A., Termiczna optymalizacja układów VLSI przy
pomocy sieci neuronowych,
VI Konferencja Naukowa “Technologia Elektronowa” - ELTE’97,
Krynica, 6-9 maja 1997, ss. 434-437

[42]

Kos A., Przegląd prac dotyczących analizy termicznej i optymalizacji układów elektronicznych,
Kwartalnik Elektroniki i Telekomunikacji, vol. 42, zeszyt 4, 1996, ss. 365-376

[41]

Dziurdzia P., Kos A., ASICs for Hybrid Ignition Systems,
Proc. Of the 20^th Conference of the International Society for Hybrid Microelectronics Poland Chapter,
Jurata, September 15-18, 1996, pp. 125-128

[40]

Kuźmicz W., Pfitzner A., Wielgus A., Fijałkowski A.,
Łuba T., Jasiński K., Turowski M., Kos, A.,
Układy ASIC w małych i średnich firmach. Formy wsparcia i pomocy,
Prace Instytutu Technologii Elektronowej, Zeszyt 4/5, Warszawa 1996, ss. 23-58

[39]

A. Kos, Is Continuing Education a Necessity ?, Editorial ,
Microelectronics International, No.41, September 1996, p.2

[38]

Bratek P., Kos A., Self-organising neural computations for optimisation of IC
topography in thermal aspect,
Proc. of the XIX Conference on Circuit Theory and Electronic Networks,
Krynica, 23-26 October, 1996, pp. 627-632

[37]

Mączka H., Dziurdzia P., Kos A., Neural algorithm for minimisation of total length
of connections in VLSI circuits,
Proc. of the XIX Conference on Circuit Theory and Electronic Networks,
Krynica, 23-26 October, 1996, pp. 319-324

[36]

Gajęcki M., Kos A., A problem of optimization of topography of VLSI Circuits,
Proc. of the XIX Conference on Circuit Theory and Electronic Networks,
Krynica, 23-26 October, 1996, pp. 307-312

[35]

Kos A., Estimation of thermal dynamics of ICs,
Proc. of the 2nd International Workshop on Thermal Investigation
of ICs and Microstructures,
Budapest, Hungary, 25-27 September 1996, pp. 253-256.

[34]

Wiatr K., Gorgoń M., Kasperek J., Rajda P.J., Russek P., Brzozowski I.,
Programmable Logic Device in Electronic Engineering Education,
Proceedings of the 3^rd MIXDES Conference,
Łódź, Poland, 30 May-1 June, 1996, pp. 606-610

[33]

Bratek P., Kos A., Complex optimisation of topology of VLSI circuits with
self-organising neural nets,
Proc. of the 3rd Advanced Training Course - Mixed Design of Integrated Circuits and
Systems, Education of Computer Aided Design of Modern Integrated Circuits and Devices,
Łódź, Poland, 30 May-1 June 1996, pp. 78-83.

[32]

Bratek P., Kos A., Zastosowanie sieci neuronowych do projektowania
układów mikroelektronicznych,
Materiały I Seminarium - Zagadnienia Termiczne w Elektronice,
Szklarska Poręba, 13-15 maja 1996, ss. 95-100.

[31]

Kos A., Projektowanie i optymalizacja termiczna układów
mikroelektronicznych w AGH,
Materiały I Seminarium - Zagadnienia Termiczne w Elektronice,
Szklarska Poręba, 13-15 maja 1996, ss. 31-37.

[30]

Sroga W., Bratek P., Bogusz A., Kos A., Optimisation of total wire length in VLSI design by self-organising neural networks,
Proc. of the Second Conference on Neural Networks and Their Applications,
Szczyrk, 30 IV-4.V. 1996, Vol. II, pp. 433-438.

[29]

Bratek P., Kos A., A Solution of a Topological Problem with Self-Organising
neural nets,
Proc. of the XVIII Conference on Circuit Theory and Electronic Networks,
Zgorzelisko, 1995, pp. 659-664

[28]

Kos A., Computer programs for thermal analysis and optimisation of hybrid circuits,
Proc. of the 10th European Microelectronics Conference,
May 14-17, 1995, Copenhagen, Denmark, pp.407-415.

[27]

Kos A., Some techniques for thermal analysis and optimisation of hybrid circuits,
Proc. of the USA/Poland Microelectronics Symposium,
Wroclaw, Poland, May 11, 1995, pp.41-49.

[26]

Kos A., Kuta S., Machowski W., Some problems of design and analysis
of CMOS and GaAs ICs,
Proc. of the 2nd Advanced Training Course: Mixed Design of VLSI Circuits -
Education of Computer Aided Design of Modern VLSI Circuits,
Kraków, 29-31 May 1995, pp. 305-310.

[25]

Kos A., Optimisation of microcircuits construction,
Proc. of the 2nd Advanced Training Course: Mixed Design of VLSI Circuits -
Education of Computer Aided Design of Modern VLSI Circuits,
Kraków, 29-31 May 1995, pp. 37-46, (invited paper).

[24]

Kos A., De Mey G., Boone E., Experimental verification of the temperature distribution on ceramic substrates,
Journal of Physics D, Applied Physics, 27, 1994, pp. 2163-2166

[23]

Harrold S.J., Kos A., Thermal oscillations in GaAs amplifiers,
Proc. of the XVII Conference on Circuit Theory and Electronic Networks,
Wrocław - Polanica Zdrój, October, 19-21, 1994, pp. 383-388

[22]

Kos A., De Mey G., Thermal placement in hybrid circuits -a heuristic approach,
Active and Passive Electronic Components, 1994, Vol. 17, pp. 67-77

[21]

Kos A., Modelowanie hybrydowych układów mocy i optymalizacja ich
konstrukcji ze względu na rozkład temperatury,
Rozprawy i Monografie, Nr 1, Wydawnictwa AGH, 1994

[20]

Kos A., Neural nets for analysis and optimisation of power hybrid circuits,
referat zaproszony, Konferencja "Mixed Design of VLSI Circuits",
Dębe k/o Warszawy, 5-9 kwietnia 1994, pp. 96-101

[19]

Kos A., Analiza temperaturowa układów hybrydowych.
Część II: Metody numeryczne. Praktyczne zastosowania,
Kwartalnik Elektroniki i Telekomunikacji, 1994, 40, z.1, ss. 93-112

[18]

Kos A., Analiza temperaturowa układów hybrydowych. Część I: Metody analityczne,
Kwartalnik Elektroniki i Telekomunikacji, 1994, 40, z.1, ss. 75-92

[17]

Kos A., A reduction of a thermal model of power hybrid circuits,
Hybrid Circuits, 1994, No.33, pp. 25-27

[16]

Kos A., De Mey G., Neural computation for optimum power hybrid circuits design,
International Journal of Electronics, 1994, vol. 76, No. 4, pp. 681-692

[15]

Kos A., Boone E., Verification of temperature computations of hybrid circuits,
XVI Krajowa Konferencja Teoria Obwodów i Układy Elektroniczne,
Kołobrzeg, 26-28.X.1993, pp. 150-155

[14]

Kos A., Temperature computations in power microcircuits,
Hybrid Circuits, 1993, No.31, pp. 12-14

[13]

Kos A., TOPO_SPICE program for electro-thermal analysis,
Proc. of the 9th European Hybrid Microelectronics Conference, ISHM,
Nice, France, June 2-4, 1993, pp. 460-467

[12]

Kos A., Temperature fields computations in microcircuits with finite difference method,
Proc. of the 7th Int. Conf. on Systems, Modelling and Control,
Zakopane, May 17-21, 1993, Vol. I, pp. 266-271

[11]

Kos A., An approach to thermal placement in power electronics using neural networks, Proc. of the 1993 IEEE Int. Symposium on Circuits and Systems,
Chicago, Illinois, May 3-6, pp. 2427-2430

[10]

Kos A., Ziółko M., Modelling of temperature fields of power hybrid circuits,
Proc. of the 12-th IASTED International Conference, Modelling, Identification and Control, Innsbruck, Austria, Feb. 15-17, 1993, pp.296-298

[9]

Kos A., Compromise in Choleski's method used in power microelectronics,
Proc.of the Int. AMSE Conf. Calcutta, India, Dec. 7-9, 1992,
AMSE Press, vol. 3, pp.101-110

[8]

Kos A., Temperature estimation in power circuits using multilayer perceptrons,
XV Krajowa Konferencja Teoria Obwodów i Układy Elektroniczne,
Warszawa-Szczyrk, 20-23.X.1992, pp. 614-619

[7]

Kos A., Hopfield neural network approach in quasi-optimum thermal placement,
XV Krajowa Konferencja Teoria Obwodów i Układy Elektroniczne,
Warszawa-Szczyrk, 20-23.X.1992, pp.607-613

[6]

Kos A., Jasielski J., DC analysis of power microcircuits with TOPO-SPICE,
XV Krajowa Konferencja Teoria Obwodów i Układy Elektroniczne,
Warszawa-Szczyrk, 20-23.X.1992, pp.139-144

[5]

Kos A., New method of thermal placement in hybrid circuits,
Proc. of the Int. Conf. on Microelectronics,
Warszawa, 1992, pp. 398-409

[4]

Kos A., Thermal placement in microcircuits using neural computation networks,
Proc. of the Int. 92 Chicago Conference on Signals, Data and Systems,
USA, Sept. 2-4 1992, vol. 2, pp.21-28

[3]

Kos A., Temperature prediction with neural nets in hybrid power circuits,
Proc. of the First Int. Conf. on Electronics and Automatic Control,
Tizi-Ouzou, Algeria, 4-6 May 1992, vol. 1, pp. 161-168

[2]

Kos A., Accuracy of temperature computation in hybrid microelectronics,
Hybrid Circuits, 1992, No. 27, pp.25-27

[1]

Kos A., The multi-layer perceptron as a tool for hybrid circuits topology design,
AMSE Periodicals, 1992, vol. 43, no.1, pp.55-63